Eliminate system growth pains with a MUP/controller interface

D.L. Ruhberg, ⁄ Wood · OSTI OAI (U.S. Department of Energy Office of Scientific and Technical Information) · 1982

Employing bus-arbitration and common data-transfer techniques, an 8-bit MUP plus an intelligent peripheral controller combine to form an expandable multiprocessor system. The authors consider a multiprocessor configuration that couples an MC6809e MUP with an MC68120 intelligent peripheral controller. By uniting single-bus simplicity with dual-bus performance, this duo meets 8-bit processing needs and-with 16-bit internal capability-accommodates increased throughput requirements without total system redesign.

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