A 42ps 2K-gate GaAs gate array
Nagaoki Toyoda, Naotaka Uchitomi, Y. Kitaura, Masao Mochizuki, K. Kanazawa, Tomoki P. Terada, Y. Ikawa, Akimichi Hojo · 1985
TO INCREASE speed of microelectronic systems, it is the inter-chip signal delay that should be reduced by maximizing the integration level. As the integration level increases, however, the development time becomes longer. The rapid development of LSIs is increasingly important because the product life cycle has been becoming shorter. A