Intel's FLEXlogic FPGA architecture
D.E. Smith · 2002
Intel's FLEXlogic field-programmable gate array family is a segmented architecture, SRAM (static random-access memory)-based family with on-chip nonvolatile memory. The architecture is quick to learn and easy to use for designers with standard PLD experience. Devices are organized into configurable function blocks (CFBs). Each CFB can be configured as a PLD block or as a bank of SRAMs. CFBs configured as PLD blocks include advanced features that provide significant design flexibility and high integration. Truly predictable timing simplifies the design and simulation process. The inherent speed of the FLEXlogic FPGA family, together with its selectable 3.3-V or 5-V I/O, allows it to be used in areas where previous FPGA architectures cannot operate. The iFX780, the first member of the family, illustrates the architecture.>