An 8gb multi-level NAND flash memory with 63nm STI CMOS process technology
Dae-Seok Byeon, Sung-Soo Lee, Young-Ho Lim, Jin‐Sung Park, Wook-Kee Han, Pansuk Kwak, Dong-Hwan Kim, Dong-Hyuk Chae, Seunghyun Moon, Seungjae Lee, Cho Hyun-Chul, Jungwoo Lee, Moo‐Sung Kim, Joon-Sung Yang, Young‐Woo Park, Duk-Won Bae, Jungdal Choi, Sung‐Hoi Hur, Kang-Deog Suh · 2005
An 8 Gb multi-level NAND flash memory is fabricated in a 63 nm CMOS technology with shallow trench isolation. The cell and chip sizes are 0.02 /spl mu/m/sup 2/ and 133 mm/sup 2/, respectively. Performance improves to 4.4 MB/s by using the 2/spl times/ program mode and by decreasing the cycle time from 50 ns to 30 ns. This also improves the read throughput to 23 MB/s.