A VLSI architecture using local memory management for large DFT implementation
J.-M. Bourguet, T. Nancy, Shao-Jun Wei, J. Leroy, R.G. Crappe · 2002
With the progress of VLSI technology, the main performance constraint is not the calculation speed but the access to the external memory. In this paper we introduce an extension of Cooley-Tuckey algorithm (CT) that increases the temporal locality of memory references, enabling efficient use of a small fast on chip memory.