FPGA prototyping of an ASIP LDPC decoder for the DVB-T2 standard
Bertrand Le Gal, Christophe Jégo · Conference on Design and Architectures for Signal and Image Processing · 2012
Forward Error Correction (FEC) consists in the addition of redundancy to the binary information sequence before the transmission. This redundancy allows the FEC decoder to detect and/or to correct the effects of noise and interference encountered during the transmission. An ASIP LDPC decoder compliant with DVB-T2 standard is presented in this paper.