VLSI Architectures for the Multiplication of Integers Modulo a Fermat Number
J. J. Chang, T. K. Truong, I.S. Reed, I. S. Hsu · NASA Technical Reports Server (NASA) · 1984
Multiplication is central in the implementation of Fermat number transforms and other residue number algorithms. There is need for a good multiplication algorithm that can be realized easily on a very large scale integration (VLSI) chip. The Leibowitz multiplier is modified to realize multiplication in the ring of integers modulo a Fermat number. This new algorithm requires only a sequence of cyclic shifts and additions. The designs developed for this new multiplier are regular, simple, expandable, and, therefore, suitable for VLSI implementation.