Using lightweight checkpoint/recovery to improve the availability and designability of shared memory multiprocessors
Daniel J. Sorin, David Alvra Wood · 2002
In this thesis, we address the issues of availability and designability for shared memory multiprocessors. While Moore's Law has provided architects with faster and more numerous transistors, it has correspondingly degraded availability and designability. Availability is increasingly difficult to achieve due to the combination of smaller devices and wires, along with more components in more aggressive designs. Designability, which we define as the difficulty of designing and verifying a computer system, has also suffered as a result of these same trends. As computer architects are given more transistors with which to work, system designs generally become much more complicated and more difficult to verify correct.