On line mode incremental Hough transform implementation on Xilinx Fpga's
Hamid Bessalah, Sélim Seddiki, F. Alim, Mohamed A. Bencherif · 2008
Knowing that, the computing process of the Incremental Hough Transform (IHT) is characterized by a purely sequential structure, and from the fact, the on line mode arithmetic is more suitable for the computation of this kind of operations. We propose in this paper, a new Incremental Hough Transform algorithm and a suitable architecture implemented on a Xilinx FPGA circuit. In this study, we will show how on line arithmetic is used to implement a pipelined architecture of the Incremental Hough Transform and we will demonstrate that it might be used successfully for real time applications.