Performance Analysis of Multibuffered Multistage Interconnection Networks using Small Clock Cycle Scheme
Youngsong Mun · Journal of Internet Computing and services · 2005
Ding and Bhuyan, however, has shown that the performance of multistage interconnection networks(MIN's) can be significantly improved if the packet movements are confined within each pair of adjacent stages using small clock cycles. In this paper, an effective model for estimating the performance of multibuffered MIN's employing the approach is proposed. the relative effectiveness of the proposed model is identified compared to the traditional design.