An Optimizer for Multimedia Instruction Sets
Gerald Cheong · 2007
Vector Machine The SUIF vectorizer [2] is used to generate vector operations. It performs vectorization only on parallel loops. Note that reduction is currently not recognized. We present the vector machine model in section 3.1, and describe the vectorization mechanism in details in section 3.2. 3.1 The Machine Model The Abstract Vector Machine contains infinite number of infinite-length vector registers. Vector operations work with these registers. In the SUIF file, vector regions are marked with annotated io_mrk instructions, and vector operations may only occur within these regions. There are four categories of vector operations: 1. Vector Load: loads a block of memory into a vector register, setting the length of the vector register to be the number of elements in the block of memory; 2. Vector Comparison: perform arithmetical comparisons on operand vector registers, and write the output as a mask to an output vector register. The mask may be used by conditional arithmetic oper...