Adaptive Computing and Run-time Reconfiguration
Sandeep K. Neema, Ted Bapty, Jason Scott · 2000
Adaptive Computing is a relatively new research area [1]. The main thrust of this research area to date has been in programmable/configurable hardware. Significant success has been reported. The programmable gate array (FPGA) hardware technology has matured, producing very high-density gate arrays (~1 million gates) with relatively low configuration times. A variety of hardware platforms comprising of microprocessors and FPGA’s have been developed. Many applications have been ported over to these platforms, demonstrating significant speedup over the conventional microprocessor based implementation [2]. The promise of adaptive computing however extends far beyond point applications. True adaptive computing systems will be able to dynamically evolve with changes in environment at runtime, without compromising the stability and real-time properties of the system. To that effect, the main challenge to be addressed is run-time reconfiguration. Some researches have demonstrated restricted capability of run-time reconfiguration, however most of these approaches are application specific and lack formalism. Additionally, the run-time reconfiguration approach in these efforts is directed solely towards reconfiguring the programmable hardware. This limits the technique’s applicability, as many high-performance systems involve a mix of hardware and software. We therefore believe that a more comprehensive approach is required and that the problem of run-time reconfiguration needs to be addressed at multiple levels. In this paper we discuss some of the issues involved in