High-speed FIR digital filter using residue number arithmetic implemented in multiple-valued logic
Soderstrand, R.A. Escott · OSTI OAI (U.S. Department of Energy Office of Scientific and Technical Information) · 1983
High-speed digital filters are designed using residue number system (RNS) computing hardware implemented in multiple-valued logic (MVL). Two digit MVL moduli of 5, 7, and 8 levels respectively (moduli 25, 49, and 64) yield a 16-bit computational precision suitable for 8-bit input and output signals. The proposed structure is highly pipelined and offers high speed (i.e. 20 mhz throughout) with fewer components and much fewer interconnections when compared with a binary implementation. 7 references.