Assertion-based dynamic verification for executable UML specifications
Masahito Sugai, Akira Teruya, Eiichiro Iwata, Nurul Azma Zakaria, Noriko Matsumoto, Norihiko Yoshida · 2008
Embedded systems have grown large and complex, and the man-hour requirement of their verification is increasing. In embedded systems design, Executable UML (xUML) is attracting attentions. It is a crucial issue to improve the efficiency of verification in xUML. We propose an assertion-based dynamic verification for xUML in this paper. The assertion-based verification improves verification efficiency and reliability of the systems. We implement a tool realize the assertion-based dynamic verification for xUML, and confirm the validity of our proposal through some experiments.