Two-chip implementation of the RSA public-key encryption algorithm
R.F. Rieden, J.B. Snyder, R.J. Widman, W.J. Barnard · OSTI OAI (U.S. Department of Energy Office of Scientific and Technical Information) · 1982
A system has been developed which employs two identical integrated circuits to perform the encryption algorithm developed by Rivest, Shamir, and Adleman (RSA) on a 336-bit message. The integrated circuit used in the system employs the 3-micron polysilicon gate, radiation-hard, CMOS technology developed at Sandia National Laboratories.