Fabrication of Custom Designed Telephone Exchange Microchip
O.P. Wadhawan, V K Dwivedi, Subodh Johri, P.N. Andhare, D. P. Runthala, S S Shekhawat, W.S. Khokle, S. K. Lahiri · IETE Technical Review · 1989
This chip was design basically to replace 28 standard integrated circuits on the subscriber module of a 8088 A microprocessor-based PAX system. The circuit was fabricated using silicon gate NMOS process developed at CEERI. The threshold voltages were controlled by ion-implantations and tested on the test structures on wafer after fabrication. The minimum feature size is 6 micron and the chip containing about 500 components is of 3.35 × 3.35 mm size. The circuit chip was bonded and encapsulated in 44 lead ceramic chip carrier. The packaged chips passing all the set specifications were put in the system and found to work satisfactorily.