Low Power Embedded Core Architecture
Abderazek Ben Abdallah · Atlantis ambient and pervasive intelligence · 2010
Queue based instruction set architecture processor offers an attractive option in the design of embedded systems. This chapter describes architecture and design results of a low power 32-bit Synthesizable QueueCore (QC-2) with single precision floating point support. This soft core is an efficient architecture which can be integrated in a multicore platform targeted for low power embedded applications.