PLA in ASIC Design
Maodudul Hasan, Rajeev Jain · IETE Technical Review · 1989
VLSI chips are increasingly using PLAs for realization of subsystems. For NMOS technology, design of PLA is relatively straight forward. However, CMOS technology offers a few choices like pseudo-NMOS, static CMOS and domino CMOS PLA. In this paper performance of these circuits are discussed. The choice of a particular PLA design would be based upon its power dissipation, delay time and chip area. Indeed, quick design is the most attractive feature of the PLA and this is a powerful tool for ASIC design.